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rev. 1.0 1/11 copyright ? 2011 by silicon laboratories SI4831/35-b30 SI4831/35-b30 b roadcast m echanical t uning am/fm/sw r adio r eceiver features applications description the SI4831/35-b30 is the 2nd generation mechanical-tuned digital cmos am/fm/sw radio receiver ic that integrat es the complete receiver function from antenna input to audio output. like other successful audio products from silicon labs, SI4831/35-b30 offers unmatched in tegration and pcb space savings with minimum external components and a small board area. the SI4831/35-b30 requires a simple application circuit and removes any requirements for manually tuning components during the manufactur ing process. the SI4831/35-b30 is a very simple product to design, manufact ure, and support across multiple product lines. the receiver has very low power consumption, runs off two aaa batteries, and delivers the performance benefits of digi tal tuning to the analog radio market. functional block diagram ? worldwide fm band support (64?109 mhz) ? worldwide am band support (504?1750 khz) ? sw band support (si4835 only) (5.6?22 mhz) ? excellent real-world performance ? en55020-compliant ? no manual alignment necessary ? flexible band selections ? automatic frequency control (afc) ? integrated ldo regulator ? 2.0 to 3.6 v supply voltage ? wide range of ferrite loop sticks and air loop antennas supported ? 24-pin ssop ? rohs-compliant ? supports station and stereo led indicators ? direct volume control ? bass and treble tone control ? table and portable radios ? stereos ? mini/micro systems ? cd/dvd players ? boom boxes ? modules ? clock radios ? mini hifi ? entertainment systems si4830/34 adc adc dsp dac dac rout lout afc SI4831/35 rfgnd lna ami agc reg vdd1/2 2.0~3.6v xtal osc fmi 0/90 adc rst xtali am ant fm/sw ant control interface station stereo vol/tone tune 1/2 band this product, its features, and/or its architecture is covered by one or more of the following patents, as well as other patents, pending and issued, both foreign and domestic: 7,127,217; 7,272,373; 7,27 2,375; 7,321,324; 7,355,476; 7,42 6,376; 7,471,940; 7,339,503; 7,339,504. ordering information: see page 13. pin assignments SI4831/35-b30 (ssop) nc fmi rfgnd ami band tune2 tune1 station stereo nc nc nc rst lout rout dbyp vdd2 vol+/treble vol-/bass xtalo xtali vdd1 gnd gnd 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13
SI4831/35-b30 2 rev. 1.0
SI4831/35-b30 rev. 1.0 3 t able of c ontents section page 1. electrical specificat ions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3. bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 4. functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 4.1. overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 4.2. fm receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3. am receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.4. sw receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 4.5. frequency tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.6. band select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.7. bass and treble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.8. volume control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5. pin descriptions: SI4831/35-b30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6. ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7. package markings (top marks) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.1. SI4831/35-b30 top mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 7.2. top mark explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8. package outline: SI4831/ 35-b30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9. pcb land pattern: SI4831/35-b 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10. additional reference resour ces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 document change list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 contact information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
SI4831/35-b30 4 rev. 1.0 1. electrical specifications table 1. recommended operating conditions 1,2 parameter symbol test condition min typ max unit supply voltage 3 v dd 2?3.6v power supply powe rup rise time v ddrise 10 ? ? s ambient temperature t a ?15 25 85 ? c note: 1. typical values in the data sheet apply at v dd = 3.3 v and 25 c unless otherwise stated. 2. all minimum and maximum specifications in the data s heet apply across the recommended operating conditions for minimum v dd = 2.7 v. 3. operation at minimum v dd is guaranteed by characterization when v dd voltage is ramped down to 2.0 v. part initialization may become unresponsive below 2.3 v. table 2. absolute maximum ratings 1,2 parameter symbol value unit supply voltage v dd ?0.5 to 5.8 v input current 3 i in 10 ma operating temperature t op ?40 to 95 ? c storage temperature t stg ?55 to 150 ? c rf input level 4 0.4 v pk notes: 1. permanent device damage may occur if the above absolu te maximum ratings are exceeded. functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. exposure beyond recommended operating conditions for extended periods may affect device reliability. 2. the SI4831/35-b30 devices are high-perform ance rf integrated circuits with certain pins having an esd rating of < 2 kv hbm. handling and assembly of these devices should only be done at esd-protected workstations. 3. for input pins rst , vol+/treble, vol?/ bass, xtalo, xtali, band, tune2, tune1, station, and stereo. 4. at rf input pins, fmi and ami.
SI4831/35-b30 rev. 1.0 5 figure 1. reset timing table 3. dc characteristics (v dd = 2.7 to 3.6 v, t a = ?15 to 85 c) parameter symbol test condition min typ max unit fm mode supply current 1 i fm ?21.0?ma supply current 2 i fm low snr level ? 21.5 ? ma am/sw mode supply current 1 i am ?17.0?ma supplies and interface v dd powerdown current i ddpd ?10? a notes: 1. specifications are guaranteed by characterization. 2. lna is automatically switched to higher current mode for optimum sensitivity in weak signal conditions. table 4. reset timing characteristics (v dd = 2.7 to 3.6 v, ta = ?15 to 85 c) parameter symbol min typ max unit rst pulse width and tune1, tune2 setup to r st ? t srst 100 ? ? s tune1, tune2 hold from rst t hrst 30 ? ? ns 70% 30% tune1 70% 30% tune2 70% 30% t srst rst t hrst
SI4831/35-b30 6 rev. 1.0 table 5. fm receiver characteristics 1,2 (v dd = 2.7 to 3.6 v, ta = ?15 to 85 c) parameter symbol test condition min typ max unit input frequency f rf 64 ? 109 mhz sensitivity with headphone network 3 (s+n)/n = 26 db ? 2.2 ? v emf lna input resistance 4,5 ?4? k ? lna input capacitance 4,5 ?5? pf am suppression 4,5,6,7 m = 0.3 ? 50 ? db input ip3 4,8 ? 105 ? dbv emf adjacent channel selectivity 4 200 khz ? 50 ? db alternate channel selectivity 4 400 khz ? 65 ? db audio output voltage 5,6,7 ?80?mv rms audio mono s/n 5,6,7,9,10 ?55? db audio stereo s/n 3,4,5,7,9,10, ?55? db audio frequency response low ?3 db ? ? 30 hz audio frequency response high ?3 db 15 ? ? khz audio stereo separation 5,11 ?42? db audio thd 6,5,11 ?0.10.5 % audio output load resistance 4,10 r l single-ended 10 ? ? k ? audio output load capacitance 4,10 c l single-ended ? ? 50 pf powerup/band switch time 4 ??110ms notes: 1. additional testing information is available in ?an569: SI4831/35-demo bo ard test procedure.? volume = maximum for all tests. tested at rf = 98.1 mhz. 2. to ensure proper operation and receiver performance, follow the guidelines in ?a n555: si483x-b antenna, schematic, layout, and design guidelines.? silicon laboratories will evaluate schematics and layouts for qualified customers. 3. frequency is 76~109 mhz. 4. guaranteed by characterization. 5. v emf =1 mv. 6. f mod = 1 khz, mono, and l = r unless noted otherwise. 7. ? f = 22.5 khz. 8. |f 2 ? f 1 | > 2 mhz, f 0 =2xf 1 ? f 2 . 9. b af = 300 hz to 15 khz, a-weighted. 10. at l out and r out pins. 11. ? f = 75 khz.
SI4831/35-b30 rev. 1.0 7 table 6. am/sw receiver characteristics 1, 2 (v dd = 2.7 to 3.6 v, ta = ?15 to 85 c) parameter symbol test condition min typ max unit input frequency f rf medium wave (am) 504 ? 1750 khz short wave (sw) 5.60 ? 22.0 mhz sensitivity 3,4,5 (s+n)/n = 26 db ? 30 ? v emf large signal voltage handling 5 thd < 8% ? 300 ? mv rms power supply rejection ratio 5 ? v dd =100 mv rms , 100 hz ? 40 ? db audio output voltage 3,6 ? 60 ? mv rms audio s/n 3,4,6 ? 55 ? db audio thd 3,6 ? 0.1 0.5 % antenna inductance 5,7 180 ? 450 h powerup/band switch time 5 from powerdown ? ? 110 ms notes: 1. additional testing information is available in ?an569: SI4831/35-demo board test procedure.? volume = maximum for all tests. tested at rf = 520 khz. 2. to ensure proper operation and receiver performance, follow the guidelines in ?an555: si483x-b antenna, schematic, layout, and design guidelines.? silicon laboratories wi ll evaluate schematics and layouts for qualified customers. 3. fmod = 1 khz, 30% modulation, 2 khz channel filter. 4. b af = 300 hz to 15 khz, a-weighted. 5. guaranteed by characterization. 6. v in =5mvrms. 7. stray capacitance on antenna and board must be < 10 pf to achieve full tuning range at higher inductance levels. table 7. reference clock and crystal characteristics (v dd = 2.7 to 3.6 v, t a = ?15 to 85 c) parameter symbol test condition min typ max unit reference clock xtali supported reference clock frequencies ? 32.768 ? khz reference clock frequency tolerance for xtali ?100 ? 100 ppm crystal oscillator crystal oscillator frequency ? 32.768 ? khz crystal frequency tolerance ?100 ? 100 ppm board capacitance ??3.5pf
SI4831/35-b30 8 rev. 1.0 2. typical application schematic notes: 1. place c 4 close to v dd2 and dbyp pins. 2. all grounds connect directly to gnd plane on pcb. 3. pin 6 and 7 leave floating. 4. to ensure proper operation and receiver performance, follow th e guidelines in "an555: si483x-b antenna, schematic, layout, and design guidelines." silicon labs will eval uate the schematics and layouts for qualified customers. 5. pin 8 connects to the fm antenna interface and pin 12 connects to the am antenna interface. 6. place si483x as close as possible to antenna jack a nd keep the fmi and ami traces as short as possible. 5 rfgnd optional: am air loop antenna 2.0 to 3.6v 2.0 to 3.6v optional (si4835 only) 2.5k/100m fm am ba nd y1 32.768khz c2 22p c3 22p 1 stereo 2 station 3 tune1 4 tune2 5 ba nd 6 nc 7 nc 8 fmi 9 rfgnd 10 nc 11 nc 12 ami 13 gnd 14 gnd 15 rst 16 vol+/treble 17 vol-/bass 18 xtal0 19 xtali 20 vdd1 21 vdd2 22 dbyp 23 rout 24 lout u1 c5 0.47u ant1 am antenna ant2 t1 c 0.47u c4 0.1u c1 0.1u r1 100k vr1 100k b1 12 3 s2 r3 253k r4 180k r5 67k r2 10k vdd vdd station_led stereo_led fmi lout rout ami ami vdd vdd ba nd tune1 tune1
SI4831/35-b30 rev. 1.0 9 3. bill of materials table 8. SI4831/35-b30 bill of materials component(s) value/description supplier c1 reset capacitor 0.1 uf, 20%, z5u/x7r murata c4 supply bypass capacitor, 0. 1 uf, 20%, z5u/x7r murata c5 coupling capacitor, 0.47 f, 20%, z5u/x7r murata b1 ferrite bead 2.5k/100 mhz murata vr1 variable resistor (pot), 100k, 10% kennon r1 reset timing resistor, 100k, 5% venkel r2 resistor, 10k, 5% venkel r3 resistor, 253k, 1% venkel r4 resistor, 180k, 1% venkel r5 resistor, 67k, 1% venkel u1 SI4831/35-b30 mechanica l tuning radio receiver silicon laboratories s2 band switch any, depends on customer ant1 ferrite stick,180-450 h jiaxin optional components c2, c3 crystal load capacitors, 22 pf, 5%, cog (optional: for crystal oscillator option) venkel y1 32.768 khz crystal (optional: for crys tal oscillator option) epson or equivalent ant2 air loop antenna, 10?20 h various
SI4831/35-b30 10 rev. 1.0 4. functional description figure 2. SI4831/35-b30 functional block diagram 4.1. overview the SI4831/35-b30 is the industry's most advanced fully integrated, mechanical-tuned 100% cmos am/fm/sw radio receiver ic. offering unmatched integration and pcb space savings, the SI4831/35-b30 requires minimum external components and a small board area. the SI4831/35-b30 am/fm/sw radio provides space savings and low power consumption while delivering the high performance and design simplicity desired for all am/fm/sw solutions. leveraging silicon laborator ies' proven and patented digital low intermediate frequency (low-if) receiver architecture, the SI4831/35-b30 delivers superior rf performance and interference rejection in am, fm, and sw bands. the high integration and complete system production test simplifies design-in, increases system quality, and improv es manufacturability. 4.2. fm receiver the SI4831/35-b30 integrat es a low noise amplifier (lna) supporting the worldwide fm broadcast band (64 to 109 mhz). pre-emphasis and de-emphasis is a technique used by fm broadcasters to improve the signal-to-noise ratio of fm receivers by reducing the effects of high frequency interference and noise. when the fm signal is transmitted, a pre-emphasis filter is applied to accentuate the high audio frequencies. all fm receivers incorporate a de-emphasis filter which attenuates high frequencies to restore a flat frequency response. two time constants are used in various regions. the de- emphasis time constant can be chosen to be 50 or 75 s. refer to "an555: si483x-b antenna, schematic, layout, and design guidelines." the SI4831/35-b30 also has advanced stereo blending that employs adaptive noise suppression. as a signal quality degrades, the SI4831/35-b30 gradually combines the stereo left and right audio channels to a mono audio signal to maintain optimum sound fidelity under varying reception conditions. the SI4831/35-b30 can drive a stereo light with the stereo/mono information so that the user can easily discern the signal quality. si4830/34 adc adc dsp dac dac rout lout afc SI4831/35 rfgnd lna ami agc reg vdd1/2 2.0~3.6v xtal osc fmi 0/90 adc rst xtali am ant fm/sw ant control interface station stereo vol/tone tune 1/2 band
SI4831/35-b30 rev. 1.0 11 the stereo light up criteria is defined using both rssi and the left and right separation levels as these two specifications are the primary factors for stereo listening. the criteria can be set between two conditions: the left and right channels are separated by more than 6 db with rssi at >20 db or left and right channels are separated by more than 12 db with rssi at >28 db. the selection can be set up using different values of the external resister. refer to "an555: si483x-b antenna, schematic, layout, and design guidelines." 4.3. am receiver the highly integrated SI4831/35-b30 supports worldwide am band reception from 504 to 1750 khz with five sub-bands using a digital low-if architecture with a minimum number of external components and no manual alignment required. this patented architecture allows for high-precision f iltering, offering excellent selectivity and snr with minimum variation across the am band. similar to the fm receiver, the SI4831/35-b30 optimizes sensitivity and reje ction of strong interferers, allowing better reception of weak stations. to offer maximum flexibility, the receiver supports a wide range of ferrite loop sticks from 180?450 h. an air loop antenna is supported by using a transformer to increase the effective inductance from the air loop. using a 1:5 turn ratio inductor, the inductance is increased by 25 times and easily supports all typical am air loop antennas, which generally vary between 10 and 20 h. 4.4. sw receiver the si4835 supports 16 short wave (sw) band receptions from 5.60 to 22.0 mhz. si4835 supports extensive short wave features such as minimal discrete components and no factory adjustments. the si4835 supports using the fm antenna to capture short wave signals. 4.5. frequency tuning a valid channel can be found by tuning the potentiometer that is co nnected to the tune1 and tune2 pin of the SI4831/35-b30 chip. to offer easy tuning, the si 4831/35-b30 also supports a station led light. it will light up the led if the rf signal quality passes the led sensit ivity threshold when tuned to a valid station. 4.6. band select the SI4831/35-b30 supports worldwide am band with five sub-bands, us/europe/japan/china fm band with five sub-bands, and sw band with 16 sub-bands. for details on band selection, refer to "an555: si483x-b antenna, schematic, layout, and design guidelines." 4.7. bass and treble the SI4831/35-b30 further supports bass and treble tone control for superior sound quality. pins 16 and 17 can be configured for tone control, allowing customers to use either two buttons or one slide-switch to adjust the bass and treble. for further configuration details, refer to "an555: si483x-b antenna, schematic, layout, and design guidelines." 4.8. volume control the SI4831/35-b30 not only allows customers to use the traditional pvr wheel volume control through an external speaker amplifier, it also supports direct digital volume control through pins 16 and pin 17 by using volume up and down buttons. refer to "an555: si483x- b antenna, schematic, layout, and design guidelines."
SI4831/35-b30 12 rev. 1.0 5. pin descriptions: SI4831/35-b30 pin number(s) name description 1 stereo stereo indicator 2 station station indicator 3 tune1 frequency tuning 4 tune2 frequency tuning 5 band band selection and de-emphasis/stereo separation selection 6,7 nc no connect. leave floating. 8 fmi fm rf inputs. fmi should be connected to the antenna trace. 9 rfgnd rf ground. connect to ground plane on pcb. 10,11 nc unused. tie these pins to gnd. 12 ami am rf input. ami should be connected to the am antenna. 13,14 gnd ground. connect to ground plane on pcb. 15 rst device reset (act ive low) input 16 vol+/treble volume button up/treble 17 vol?/bass volume button down/bass 18 xtalo crystal oscillator output 19 xtali crystal oscillator input 20 vdd1 supply voltage. may be c onnected directly to battery. 21 vdd2 supply voltage. may be c onnected directly to battery. 22 dbyp dedicated bypass for vdd 23 rout right audio line output in analog output mode 24 lout left audio line output in analog output mode nc fmi rfgnd ami band tune2 tune1 station stereo nc nc nc rst lout rout dbyp vdd2 vol+/treble xtalo xtali vdd1 gnd gnd 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 vol-/bass
SI4831/35-b30 rev. 1.0 13 6. ordering guide part number* description package type operating temperature/voltage SI4831-b30-gu am/fm broadcast radio receiver 24l ssop pb-free ?15 to 85 c 2.0 to 3.6 v si4835-b30-gu am/fm/sw broadcast radio receiver 24l ssop pb-free ?15 to 85 c 2.0 to 3.6 v *note: add an ?(r)? at the end of the device part number to denote ta pe and reel option. the devices will typically operate at 25 c with degraded specifications for v dd voltage ramped down to 2.0 v.
SI4831/35-b30 14 rev. 1.0 7. package markings (top marks) 7.1. SI4831/35-b30 top mark 7.2. top mark explanation mark method: yag laser line 1 marking: device identifier 4831b30gu = SI4831-b30 4835b30gu = si4835-b30 line 2 marking: yy = year ww = work week tttttt = manufacturing code assigned by the assembly house. 4831b30gu yywwtttttt 4835b30gu yywwtttttt
SI4831/35-b30 rev. 1.0 15 8. package outl ine: SI4831/35-b30 the 24-pin ssop illustrates the package details for the si4 831/35-b30. table 9 lists th e values for the dimensions shown in the illustration. figure 3. 24-pin ssop table 9. package dimensions dimension min nom max a??1.75 a1 0.10 ? 0.25 b0.20?0.30 c0.10?0.25 d 8.65 bsc e 6.00 bsc e1 3.90 bsc e 0.635 bsc l0.40?1.27 0 ? 8 aaa 0.20 bbb 0.18 ccc 0.10 ddd 0.10 notes: 1. all dimensions shown are in millimeters (mm) unless otherwise noted. 2. dimensioning and tolerancing per ansi y14.5m-1994. 3. this drawing conforms to the jedec so lid state outline mo-137, variation ae. 4. recommended card reflow profile is per the jedec/ipc j-std-020 specification for small body components.
SI4831/35-b30 16 rev. 1.0 9. pcb land pa ttern: SI4831/35-b30 figure 4, ?pcb land pattern,? illustra tes the pcb land pattern details for the SI4831/35-b30-gu ssop. table 10 lists the values for the dimens ions shown in the illustration. figure 4. pcb land pattern table 10. pcb land pattern dimensions dimension min max c5.205.40 e 0.65 bsc x1 0.35 0.45 y1 1.55 1.75 general: 1. all dimensions shown are in millimeters (mm) unless otherwise noted. 2. this land pattern design is based on the ipc-7351 guidelines. solder mask design: 3. all metal pads are to be non-solder mask defined (nsmd). clearance between the solder mask and the metal pad is to be 60 m minimum, all the way around the pad. stencil design: 4. a stainless steel, laser-cut, and electr o-polished stencil with trapezoidal walls should be used to assure good solder paste release. 5. the stencil thickness should be 0.125 mm (5 mils). 6. the ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads. card assembly: 7. a no-clean, type-3 solder paste is recommended. 8. the recommended card reflow profile is per the jedec/ipc j-std-020 specification for small body components.
SI4831/35-b30 rev. 1.0 17 10. additional reference resources contact your local sales representative s for more information or to obtain copies of the following references: ? en55020 compliance test certificate ? an555: si483x-b antenna, schematic , layout, and design guidelines ? an569: SI4831/35-demo board test procedure ? SI4831/35-demo board user?s guide
SI4831/35-b30 18 rev. 1.0 d ocument c hange l ist revision 0.1 to revision 0.7 ? updated block diagram. ? updated application schematic. ? updated bill of materials. ? updated section ?4 .2. fm receiver?. ? updated section ?4.3. am receiver?. ? updated section ?4.6. band select?. revision 0.7 to revision 1.0 ? updated block diagram ? updated table 2, ?absolute maximum ratings 1 , 2 ,? on page 4 ? updated table 5, ?fm receiver characteristics 1 , 2 ,? on page 6 ? updated table 6, ?am/sw receiver characteristics 1, 2 ,? on page 7 ? updated ?4. functional description? ? updated ?10. additional reference resources?
SI4831/35-b30 rev. 1.0 19 n otes :
SI4831/35-b30 20 rev. 1.0 c ontact i nformation silicon laboratories inc. 400 west cesar chavez austin, tx 78701 tel: 1+(512) 416-8500 fax: 1+(512) 416-9669 toll free: 1+(877) 444-3032 email: fminfo@silabs.com internet: www.silabs.com silicon laboratories and silicon labs are trademarks of silicon laboratories inc. other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. the information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. silicon laboratories assumes no responsibility for errors and omissions, and disclaims responsib ility for any consequences resu lting from the use of information included herein. a dditionally, silicon laboratorie s assumes no responsibility for the functioning of und escribed features or parameters. silicon laboratories reserves the right to make changes without further notice . silicon laboratories makes no wa rranty, rep- resentation or guarantee regarding the suitability of its products for any particular purpose, nor does silicon laboratories as sume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any an d all liability, including wi thout limitation conse- quential or incidental damages. silicon laborat ories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the silicon laboratories product could create a s ituation where per- sonal injury or death may occur. should buyer purchase or us e silicon laboratories products for any such unintended or unauthor ized ap- plication, buyer shall indemnify and hold silicon laboratories harmless against all claims and damages.

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